«Entwurf von integrierten Leistungsverstärkern in SiGe-Technologie für Mobilfunkanwendungen Der Technischen Fakultät der Universität ...»
Design of Integrated Power Amplifiers in SiGe
Technology for Mobile Terminal Applications
Entwurf von integrierten Leistungsverstärkern in
SiGe-Technologie für Mobilfunkanwendungen
Der Technischen Fakultät der
zur Erlangung des akademischen Grades
Erlangen – 2006
Als Dissertation genehmigt von der Technischen Fakultät der Universität ErlangenNürnberg Tag der Einreichung: 24.04.2006 Tag der Promotion: 06.07.2006 Dekan: Prof. Dr.-Ing. Alfred Leipertz Berichterstatter: Prof. Dr.-Ing. Robert Weigel Prof. Dr.-Ing. Werner Wiesbeck Abstract The thesis demonstrates the design of high frequency SiGe bipolar integrated power amplifiers (PAs) for mobile communication terminals with the support of electromagnetic (EM) simulation.
Three single-ended PA designs for mobile terminals operating up to 6GHz have been designed, realized and measured. The realized amplifiers fulfill the assumed requirements in terms of overall performance mainly due to the exact description of parasitics in passive networks. The EM simulation has been introduced in the design of integrated spiral inductors, transistor feeding lines, power transistor surroundings and complete matching circuits.
Simultaneously the evaluation and adaptation of SiGe technology for the purposes of state of the art PA applications is being presented.
The realized power amplifier designs include:
• An integrated linear dual band WLAN PA for the IEEE 802.11a/b/g specification.
• A three-staged linear UMTS PA intended for WCDMA application.
• A dual band GSM PA with 58% power added efficiency and 35.5dBm output power in the 900MHz band.
Additionally, the EM simulation introduced in chip design contributed to the development of new integrated matching structures. Practically applied for PAs, such arrangements result in
an overall performance improvement. In particular the newly realized structures include:
• A low-loss, high quality factor microstrip line in lossy silicon to improve linearity and efficiency of a WLAN IEEE 802.11a PA.
• An integrated, modified microstrip line with defected groundplane structure to improve a 5GHz WLAN PA in terms of broadband linearity response.
• Several transistor feed network realizations for a GSM PA by which the power transistor’s robustness has been increased. With an optimized transistor feeding network, in a 2GHz WLAN PA, an increase of linearity and efficiency performance was observed.
I Kurzfassung Die vorliegende Arbeit befasst sich mit dem Entwurf von integrierten HochfrequenzLeistungsverstärkern (PAs) für Mobilfunkanwendungen unter Verwendung elektromagnetischer (EM) Simulationssoftware.
Es werden drei Leistungsverstärker für Mobilfunkanwendungen gezeigt. Die realisierten Verstärker erfüllen die angenommenen Spezifikationen hauptsächlich aufgrund der exakten Beschreibung der parasitären Effekte in den passiven Netzwerken. Die EM-Simulation wird dabei beim Entwurf der integrierten Induktivitäten, der Transistorzuführungen, der Leistungstransistorumgebung und der kompletten Anpassungsschaltungen eingesetzt.
Zudem wird die Evaluierung und Anpassung der SiGe-Technologie an die Anforderungen moderner PA-Anwendungen dargelegt.
Die drei Entwürfe umfassen folgende Zielanwendungen:
• Ein integrierter WLAN-Leistungsverstärker für die IEEE 802.11a/b/g-Spezifikation, der damit zwei Frequenzbereiche, 2.45GHz und 5.25GHz abdeckt.
• Ein dreistufiger linearer UMTS-Leistungsverstärker für WCDMA-Anwendungen.
• Ein integrierter GSM-Dual-Band-Leistungsverstärker mit 58% Wirkungsgrad und
35.5dBm Ausgangsleistung im 900MHz-Band.
Des Weiteren ermöglichte der gezielte Einsatz von EM-Simulationen den Entwurf von neuen
integrierten Anpassstrukturen. In der praktischen Umsetzung ergab sich daraus eine Verbesserung wesentlicher Verstärkereigenschaften. In Rahmen dieser Arbeit wurden folgende Strukturen realisiert:
• Eine dämpfungsarme Mikrostreifenleitung, realisiert in einem stark leitfähigen Silizium-Substrat, die durch ihre hohe Güte zur Verbesserung der Linearität und des Wirkungsgrades eines WLAN-IEEE-802.11a-Leistungsverstärkers beiträgt.
• Eine integrierte Mikrostreifenleitung mit einer periodischen Massestruktur zur weiteren Verbesserung eines 5GHz-WLAN-Leistungsverstärkers in Hinblick auf die Bandbreite.
• Mehrere Transistor-Feeder für einen GSM-Leistungsverstärker, mit dem Ziel einer homogenen Auslastung des Leistungstransistors. Mit einer optimierten Transistorverdrahtung wurde eine Verbesserung der Effizienz und der Linearität eines 2GHzWLAN-PAs erreicht.
VIII SiP System in Package SMD Surface Mount Device Snn S-matrix element SoC System on Chip SPICE Simulation Program with Integrated Circuit Emphasis TLM Transmission Line Matrix TX Transmit path UBE Base emitter voltage UCB0 Breakdown voltage UCE Collector emitter voltage UCE0 Breakdown voltage UMTS Universal Mobile Telecommunications System V Voltage VCC Supply voltage VGA Variable Gain Amplifier VIBIC Vertical Bipolar Intercompany Model VMAX Maximal voltage VSWR Voltage Standing Wave Ratio WCDMA Wideband Code Division Multiple Access WLAN Wireless Local Area Network Ynn Y-matrix element Z0 Characteristic impedance ZIN Input impedance ZL Load impedance Znn Z-matrix element ZOUT Output impedance ZS Source impedance βAC Small signal current amplification.
γ Complex propagation constant εo Permittivity of free space εr Relative permittivity µ Permeability η Passive power transfer efficiency ρ Conductor resistance ω Angular frequency
1.1. Motivation The very fast growing market for telecommunication terminals increases the pressure on hardware producers for more innovation and new designs. Recently, the time in which new devices are being developed has shortened significantly and the number of sold mobile terminals enlarged dramatically. That increases the design risk for manufacturers and puts more pressure on the correct forecast during the design stage. The end users however require also high quality of service in terms of long durability, stand-by time, talk time and up to date services. Driven by these needs the semiconductor manufacturers have to develop technologies which are suitable for new applications and look for the solutions which precisely predict their products.
Figure 1.1 Main building blocks of a mobile terminal with marked integration steps into single chips.
Modern mobile terminals consist of many different Radio Frequency (RF) parts or modules.
The main building blocks of a typical mobile terminal are depicted in Figure 1.1 where also the latest and future levels of chip integration are marked. Due to the miniaturization requirements and reduction of the Bill of Materials (BoM) for mobile terminal producers the majority of devices have been integrated into chips or ICs (Integrated Circuits) or even multifunctional System on Chip (SoC) solutions. In today’s level of integration the following separate parts can be distinguished: baseband circuitry, transceiver, filters, switch or duplexer, power amplifier and antenna. In the future however all those parts should be integrated into a onechip RF solution which will make the design enormously difficult.
In today’s mobile communication systems the operating frequencies of the RF networks and circuits reach up to 6GHz and therefore have to be considered as microwave applications.
This leads to the necessity of the use of microwave tools for designing devices working in the mentioned frequency range. The most important circuits which have to be designed in such a way are mixers, oscillators, low noise amplifiers (LNAs), switches, filters and power amplifiers (PAs).
Up to now chip design methodologies have not included tools which usually were used for microwave or printed circuit board (PCB) design. The ICs dimensions were considered to be too small compared to the wavelength. However with the increase of frequencies all metal lines should be treated as distributed (and should now be called transmission lines). Additionally increasing frequencies produce various parasitic effects which can not be overcome in the chip design. Therefore, to describe and correctly model all passives integrated on a chip an electromagnetic (EM) simulation is necessary. An accurate computer aided-design (CAD) can substantially reduce design-fabrication test cycle, very expensive for integrated circuit manufacturers.
In addition the time in which a product can be merchandized, the ‘time to market’, can in this way be reduced, which in the case of commercial semiconductor manufacturers plays a very important role.
Moreover, in PAs built with the use of modern silicon technologies, where high integration is possible, passive devices can occupy more than 50% of the overall chip area – a fact that can not be neglected.
For example integrated inductors, which represent today the most complex passive parts of the chip, require very precise modeling. Generally speaking, the inductor’s performance is dominated by parasitic phenomena. Conventional methods involving analytical models are limited in terms of losses, parasitic coupling and accuracy. With the use of EM simulators the designer gets layout freedom and is not bound to predefined libraries with fixed layouts. In consequence every inductor can be treated individually. Moreover, coupling between inductors or the coupling between inductor and another element can be considered during the design procedure.
The reduction of time in which the precise EM simulation is performed allows optimization of the layout; even in terms of system simulation. In this way the digital simulation is combined with data coming from solved Maxwell equations, and two levels of abstraction are treated together.
EM solvers give also the possibility to integrate and investigate typical microwave structures and make usage of effects which lead to performance enhancement. For example the Defected Ground Structure (DGS), which is broadly used in PCB design, can be fully integrated on chip when special technological features are implemented. By making use of all characteristics like electrical prolongation (with the same geometrical length) and new matching abilities, such structures can be applied in integrated matching networks, which lead to a better performance of PAs.
Furthermore, layout optimization performed with the use of EM solvers can also lead to transistor ruggedness improvement, which is enormously important in PA design. When advanced transistor models are applied parameters like parasitic oscillation or first breakdown behavior can be optimized during the design stage. Up to now, this progress was only possible through technology changes only.
Summarizing, the precise EM simulation introduced into the classical chip design shows very high potential. State of the art design methodology is usually based on poor-quality models, which do not take into account the previously mentioned quantities and qualities. Moreover, no on-chip engineering was possible and newly designed structures could not be properly investigated.
For a correct and effective PA design not only high-quality tools are required but also the introduction of superior technology in which those devices can be manufactured. In the case of PAs the challenge for mass production companies is the trade off between size, prize, power,
linearity, gain, ruggedness and operating frequency. It is necessary to add that all overall parameters of PAs are extremely dependent on the applied technology.